Using Schottky barrier diodes for D1 and D2 rather than common diodes reduces the low-level voltage on the bus, improving the noise margin. 使用肖特基二极管D1和D2,而不是普通二极管,为的是减少总线上低状态电压,改进噪声极限。
Special noise elimination setting restrain machinery noise. Noise margin refers to the maximum noise voltage that can be added to the generated signal in a digital circuit before an undesirable change is caused in the circuit output. 特殊设计的专用降噪消声装置的采用,极大的抑制了机械噪声。噪声极限就是指可以加在数字电路的正常信号上,而又不对正常输出造成危害的最大噪声。
Noise margin: The term noise refers to any undesirable signal that is superimposed on a generated signal. Home Use Air-Condition Outside Unit's Noise Control& Compressor Noise Control 噪声极限:噪声这个概念指任何正常信号之外不需要的信号。家用空调器室外机组的噪声控制&压缩机噪声控制
The noise margin, the transient behavior and the fan out ability of the cells are explained. 说明了标准单元库的噪声容限、瞬态特性和单元扇出能力的描述方法。
The optimization of cell static noise margin enhances the anti-jamming ability of SRAM. 噪声容限的优化增强了SRAM的抗干扰能力。
The structure, the principles, the behavior of dc switch, the noise margin of GaAs source couple FET logic ( SCFL) and the characteristic of this circuit are analyzed in this paper. 分析了GaAs源耦合FET逻辑电路的结构,阐述了该电路的工作原理、开关特性和噪声容限,分析了该电路的特点。
The first two methods use the advanced GaAs materials and devices to reduce the noise of receiving system. Without increasement of the transmitted power, the system margin gains 1 dB compared to the conventional project margin, the information rate can be increased 2 Mbps or more. 前两种方法通过采用先进的GaAs材料和器件降低接收系统的噪声,在发射功率不变的情况下,使系统余量比常规工程设计余量提高1dB以上,信息速率可以提高2Mbps以上。
But because the noise is existent in all engineering problem, the indetermination of the environment condition, model error margin, uncompleted measured data, the method not perfect and the insensitivity of local damage etc, most of the methods could hardly be applied in practice. 但由于测量噪声、模型误差、环境条件的不确定性、测量数据的不完整、识别方法的不完善和局部损伤的不敏感性等问题而难以得到广泛的实际应用。
Parameters that are important to Manchester decoding such as the acceptable maximum noise pulse width, edge fluctuation margin all are in deep-research. 对解码有关键影响的参数,如最大允许噪声脉冲宽度、跳变沿波动裕量等,进行了深入分析。
However, in the traditional digital CMOS ICs, the decrease of the supply voltage results in slow speed and small noise margin. 而在传统的数字CMOS集成电路中,电源电压下降会导致电路响应速度慢和较小的噪音边界,这给电路设计带来诸多困难。
Pulse signal of continually adjustable parameters and high-capacity data signal have satisfied the demand for noise margin test of digital instruments, as well as the excitation signals required during the initial designs of VLSI and RF system. 参数连续可调的脉冲信号和大容量多样化的数字信号,满足了高速数字设备中噪声容限的测试以及大型集成电路和射频系统的设计初期对激励信号的需求。